1. Field of the Invention
The present invention relates generally to a direct access storage device (DASD) of the type utilizing partial-response signaling and maximum-likelihood (PRML) detection together with digital filtering, and more particularly to a method and apparatus for controlling a digital filter function in a PRML magnetic recording channel.
2. Description of the Prior Art
Computers often include auxiliary memory storage units having media on which data can be written and from which data can be read for later use. Disk drive units incorporating stacked, commonly rotated rigid magnetic disks are used for storage of data in magnetic form on the disk surfaces. Data is recorded in concentric, radially spaced data information tracks arrayed on the surfaces of the disks. Transducer heads driven in a path toward and away from the drive axis write data to the disks and read data from the disks. Achievement of high data density and high data rates has resulted in the use of a PRML channel for writing and reading digital data on the disks as an alternative to the more usual peak detecting techniques.
Partial-response signaling with maximum-likelihood sequence detection techniques are known for digital data communication and recording applications. U.S. Pat. Nos. 4,786,890, 4,888,775 and 4,888,779 describe trellis and run length limited (RLL) coding techniques for transmission of digital data over PRML channels.
U.S. Pat. Nos. 4,750,058, 4,964,107, 4,970,609 and 4,945,538 describe magnetic disk drives using PRML channels. No specific details on digital filter control are disclosed in the above-listed patents.
To obtain full advantage of PRML, the received signal or the read signal must be passed through a specially designed equalizing filter which produces at its output a signal spectrum corresponding to the wave shape for which the maximum-likelihood detector is designed. When using digital filtering in a PRML system, the filter is located between an analog-to-digital converter (ADC) and other signal processing hardware which controls the system and performs the detection.
U.S. Pat. No. 4,885,757 discloses a digital maximum-likelihood sequence estimator receiver including a matched filter connected to a digital transmission channel and a sampler for providing sampled signals output by the matched filter. The sampled signals are input to an analog neural network to provide high-speed outputs representative of the transmission channel signals. The neural network outputs are provided as inputs to a coefficient estimator which produces coefficients for feedback to the matched filter. For time-varying transmission channel characteristics, the coefficient estimator provides a second coefficient output which is utilized for changing the interconnection strengths of the neural network connection matrix to offset the varying transmission channel characteristics. Disadvantages of the above-described arrangement include both the complexity of the hardware and time required for adaptively controlling the matched filter.